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11/13/03
mosfet hexfet power mosfet switch mode power supply ( smps ) uninterruptable power supply high speed power switching high voltage isolation = 2.5kvrms lead-free
low gate charge qg results in simple drive requirement improved gate, avalanche and dynamic dv/dt ruggedness fully characterized capacitance and avalanche voltage and current v dss rds(on) max i d 600v 0.75 ? 5.5a

single transistor forward notes through are on page 8 s d g active clamped forward to-220 fullp ak parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v 5.5 i d @ t c = 100c continuous drain current, v gs @ 10v 3.5 a i dm pulsed drain current 37 p d @t c = 25c power dissipation 60 w linear derating factor 0.48 w/c v gs gate-to-source voltage 30 v dv/dt peak diode recovery dv/dt 5.0 v/ns t j operating junction and -55 to + 150 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) c mounting torqe, 6-32 or m3 screw 10 lbf?in (1.1n?m)
pd - 94838 www.vishay.com 1 document number: 91175

parameter min. typ. max. units conditions g fs forward transconductance 5.5 ??? ??? s v ds = 25v, i d = 5.5a q g total gate charge ??? ??? 49 i d = 9.2a q gs gate-to-source charge ??? ??? 13 nc v ds = 400v q gd gate-to-drain ("miller") charge ??? ??? 20 v gs = 10v, see fig. 6 and 13 t d(on) turn-on delay time ??? 13 ??? v dd = 300v t r rise time ??? 25 ??? i d = 9.2a t d(off) turn-off delay time ??? 30 ??? r g = 9.1 ? t f fall time ??? 22 ??? r d = 35.5 ? ,see fig. 10 c iss input capacitance ??? 1400 ??? v gs = 0v c oss output capacitance ??? 180 ??? v ds = 25v c rss reverse transfer capacitance ??? 7.1 ??? pf ? = 1.0mhz, see fig. 5 c oss output capacitance ??? 1957 ??? v gs = 0v, v ds = 1.0v, ? = 1.0mhz c oss output capacitance ??? 49 ??? v gs = 0v, v ds = 480v, ? = 1.0mhz c oss eff. effective output capacitance ??? 96 ??? v gs = 0v, v ds = 0v to 480v dynamic @ t j = 25c (unless otherwise specified) ns parameter typ. max. units e as single pulse avalanche energy ??? 290 mj i ar avalanche current ??? 9.2 a e ar repetitive avalanche energy ??? 6.0 mj avalanche characteristics s d g parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) ??? ??? showing the i sm pulsed source current integral reverse (body diode) ??? ??? p-n junction diode. v sd diode forward voltage ??? ??? 1.5 v t j = 25c, i s = 9.2a, v gs = 0v t rr reverse recovery time ??? 530 800 ns t j = 25c, i f = 9.2a q rr reverse recoverycharge ??? 3.0 4.4 c di/dt = 100a/s t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) diode characteristics 5.5 37 thermal resistance parameter typ. max. units r jc junction-to-case ??? 2.1 r ja junction-to-ambient ??? 65 c/w parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 600 ??? ??? v v gs = 0v, i d = 250a ? v (br)dss / ? t j breakdown voltage temp. coefficient ??? 0.66 ??? v/c reference to 25c, i d = 1ma r ds(on) static drain-to-source on-resistance ??? ??? 0.75 ? v gs = 10v, i d = 3.3.a v gs(th) gate threshold voltage 2.0 ??? 4.0 v v ds = v gs , i d = 250a ??? ??? 25 a v ds = 600v, v gs = 0v ??? ??? 250 v ds = 480v, v gs = 0v, t j = 125c gate-to-source forward leakage ??? ??? 100 v gs = 30v gate-to-source reverse leakage ??? ??? -100 na v gs = -30v static @ t j = 25c (unless otherwise specified) i gss i dss drain-to-source leakage current www.vishay.com 2 document number: 91175

fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 0.1 1 10 100 0.1 1 10 100 20s pulse width t = 25 c j top bottom vgs 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v 4.7v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 4.7v 1 10 100 1 10 100 20s pulse width t = 150 c j top bottom vgs 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v 4.7v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 4.7v 0.1 1 10 100 4.0 5.0 6.0 7.0 8.0 9.0 10.0 v = 50v 20s pulse width ds v , gate-to-source voltage (v) i , drain-to-source current (a) gs d t = 25 c j t = 150 c j -60 -40 -20 0 20 40 60 80 100 120 140 160 0.0 0.5 1.0 1.5 2.0 2.5 3.0 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 10v 9.2a www.vishay.com 3 document number: 91175

fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 0 10 20 30 40 50 0 4 8 12 16 20 q , total gate charge (nc) v , gate-to-source voltage (v) g gs for test circuit see figure i = d 13 9.2a v = 120v ds v = 300v ds v = 480v ds 0.1 1 10 100 0.2 0.5 0.7 1.0 1.2 v ,source-to-drain voltage (v) i , reverse drain current (a) sd sd v = 0 v gs t = 25 c j t = 150 c j 0 400 800 1200 1600 2000 2400 1 10 100 1000 c, capacitance (pf) ds v , drain-to-source voltage (v) a v = 0v, f = 1mhz c = c + c , c shorted c = c c = c + c gs iss gs gd ds rss gd oss ds gd c iss c oss c rss 0.1 1 10 100 1000 10 100 1000 10000 operation in this area limited by r ds(on) single pulse t t = 150 c = 25 c j c v , drain-to-source voltage (v) i , drain current (a) i , drain current (a) ds d 10us 100us 1ms 10ms www.vishay.com 4 document number: 91175

0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response) fig 10a. switching time test circuit v ds 90% 10% v gs t d(on) t r t d(off) t f fig 10b. switching time waveforms
1 0.1 %
+ - fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature 25 50 75 100 125 150 0.0 1.0 2.0 3.0 4.0 5.0 6.0 t , case temperature ( c) i , drain current (a) c d www.vishay.com 5 document number: 91175

q g q gs q gd v g charge d.u.t. v ds i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + - fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v 25 50 75 100 125 150 0 100 200 300 400 500 600 starting t , junction temperature ( c) e , single pulse avalanche energy (mj) j as i d top bottom 4.1a 5.8a 9.2a www.vishay.com 6 document number: 91175

p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - fig 14. for n-channel hexfets
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ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 11/03 data and specifications subject to change without notice. repetitive rating; pulse width limited by max. junction temperature. ( see fig. 11 ) i sd 9.2a, di/dt 50a/s, v dd v (br)dss , t j 150c
starting t j = 25c, l = 6.8mh r g = 25 ? , i as = 9.2a. (see figure 12) pulse width 300s; duty cycle 2%. c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss t=60s, f=60hz to-220 full-pak package outline dimensions are shown in millimeters (inches) to-220 full-pak part marking information with assembly e xamp l e : t h is is an ir f i840g lot code 3432 as s e mb le d on ww 24 1999 in the ass embly line "k" part number lot code as s e m b l y in t e r n at ional r e ct if ie r logo 34 32 924k ir f i8 40g dat e code ye ar 9 = 1999 we e k 24 line k note: "p" in assembly line position indicates "lead-free" www.vishay.com 8 document number: 91175
legal disclaimer notice vishay document number: 99901 www.vishay.com revision: 12-mar-07 1 notice the products described herein were acquired by vishay intertechnology, inc., as part of its acquisition of international rectifier?s power control systems (pcs) business, which closed in april 2007. specifications of the products displayed herein are pending review by vishay and are subject to the terms and conditions shown below. specifications of the products displayed herein are subject to change without notice. vishay intertechnology, inc., or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. information contained herein is intended to provide a product description only. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. except as provided in vishay's terms and conditions of sale for such products, vishay assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and /or use of vishay products including liab ility or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyrigh t, or other intellectual property right. the products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify vishay for any damages resulting from such improper use or sale. international rectifier ? , ir ? , the ir logo, hexfet ? , hexsense ? , hexdip ? , dol ? , intero ? , and powirtrain ? are registered trademarks of international rectifier corporation in the u.s. and other countries. all other product names noted herein may be trademarks of their respective owners.

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